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White Paper

High-Performance Classification Using Embedded Ternary Content Addressable Memory (TCAM)

With port speeds exceeding 100Gbps, route lookups that are a fundamental application to all routers have relied on ternary content addressable memories (TCAM) to provide a lookup response within a clock cycle. However, these devices in “discrete form” suffer from limitations in terms of power, cost and real estate and to some extent lack the required flexibility. Embedding a TCAM block along with the rest of the system in a single device should overcome these disadvantages. This paper provides an overview of advantages of embedded TCAMs and describes a few applications that could take advantage of embedded TCAM technology. [View more white papers]

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Custom Embedded IP Brochures

eFlexCAM™ Custom Embedded
CAM Compilers
Binary and Ternary CAM (BCAM and TCAM) compilers in 28nm-180nm.

eFlex™ Custom Embedded
Memory IP
SRAM, ROM, MPRF, CAM, and cache custom memories.

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Home WHAT Custom IP Ternary CAM

TCAM and BCAM Compilers

eSilicon embedded binary and ternary CAMs (BCAMs and TCAMs) have been provided to networking customers for over 10 years, helping these customers meet the demand for wire-speed packet processing, access control lists and other requirements of high-bandwidth delivery.

eSilicon binary and ternary CAMs are available in geometries from 28nm to 180nm. The 28nm (TSMC 28HPM) TCAM’s performance under typical operating conditions is up to 1.6 billion searches per second (BSPS) and 800 million searches per second (MSPS) under worst conditions. The 40nm TCAM provides 680 MSPS under worst conditions.

They are available now through eSilicon. eSilicon is participating in TSMC’s Open Innovation Platform™ IP Alliance Program, which included quality assessment of this eSilicon IP through the TSMC9000™ Program.

Please contact us at This e-mail address is being protected from spambots. You need JavaScript enabled to view it for a TCAM white paper, High-Performance Classification Using Embedded Ternary Content Addressable Memory.

Features

28nm TCAM (TSMC 28HPM)

  • Up to 1.6 BSPS, typical operating conditions, TSMC 28HPM
  • 800 million searches per second (MSPS), worst operating conditions
  • Latency of one to two clock cycles
  • Hardened priority encoders
  • Multiple options to lower power
  • Column redundancy for higher yield
  • Multi-width search mode to switch dynamically between IPv4 and IPv6 searches
  • Built-in self-test (BIST) and built-in self-repair (BISR) for higher test coverage during wafer sort and production  

Availability

eSilicon 28nm and 40nm TCAMs are available now. Silicon results and data sheets are available from This e-mail address is being protected from spambots. You need JavaScript enabled to view it .

High-Performance, High-Density Embedded CAM Compilers for Network Applications

eSilicon offers a broad range of feature-rich, high-performance, high-density eFlex™ embedded CAM compilers. Our eFlexCAM™ compilers provide high-efficiency, cost-effective solutions for applications such as network search engines, cache for network processors, QoS services, classifications, Ethernet, ATM switches and other diverse networking applications.

User-Selectable Features

In addition to a full set of standard features, our eFlexCAM compilers provide a comprehensive set of user-selectable features that are chosen at compile time. Customers can choose just the features that they need for a specific application to optimize performance, power or area (PPA).

eSilicon’s philosophy for developing TCAMs is to customize the CAMs to end-customer requirements. This usually involves building custom logic and turning on multiple knobs to fine-tune the performance, power or area to customer application requirements. The chart below shows some of the elements that eSilicon has successfully used in the past to meet customer targets.


Power Options


Performance


Area


Yield


Functional Options
  • Power Down
  • Pipelined Partial Evaluation
  • Periphery Shutdown
  • Low Vt Periphery Option for 850 MSPS
  • Auto Banking
  • Push-Rule Bit Cell 13% Smaller Than Logic Rule
  • Row / Column Redundancy
  • Priority Encoder
  • Multi-Width Search Mode
    • 512x144 (Single Word)
    • 2048x36 (Quarter Word)
    • 1024x72 (Half Word)
    • 256x288 (Double Word)

Please contact us at  This e-mail address is being protected from spambots. You need JavaScript enabled to view it  if you would like to learn more about our custom IP offering.